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EPM5064JC-1 Tech Specifications

EPM5064JC-1 datasheet pdf and Embedded - CPLDs (Complex Programmable Logic Devices) product details from Altera stock available at Bonchip

Product Attribute Attribute Value
Category Integrated Circuits (ICs) / CPLDs
Manufacturer Altera
Factory Lead Time 3 Weeks
Surface Mount YES
Pbfree Code no
ECCN Code EAR99
Additional Feature LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Subcategory Programmable Logic Devices
Terminal Position QUAD
Peak Reflow Temperature (Cel) 220
Terminal Pitch 1.27mm
Pin Count 44
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 5.25V
Temperature Grade COMMERCIAL
Number of I/O 28
Propagation Delay 40 ns
Programmable Logic Type UV PLD
Number of Macro Cells 64
Number of Dedicated Inputs 7
Height Seated (Max) 4.57mm
Width 16.51mm
Product Attribute Attribute Value
Part Status Active
RoHS Status ROHS3 Compliant
Pbfree Code yes
JESD-609 Code e0
Number of Terminations 44
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code 8542.39.00.01
Technology CMOS
Terminal Form J BEND
Supply Voltage 5V
[email protected] Reflow Temperature-Max (s) 30
JESD-30 Code S-CQCC-J44
Operating Temperature (Max) 70°C
Power Supplies 5V
Supply Voltage-Min (Vsup) 4.75V
Clock Frequency 50MHz
Organization 7 DEDICATED INPUTS, 28 I/O
Output Function MACROCELL
JTAG BST NO
In-System Programmable NO
Length 16.51mm
RoHS Status Non-RoHS Compliant
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EPM5064JC-1 Documents

Download datasheets and manufacturer documentation for EPM5064JC-1

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EPM5064JC-1 brand manufacturers: Altera, Bonchip stock, EPM5064JC-1 reference price. EPM5064JC-1 parameters, EPM5064JC-1 Datasheet PDF and pin diagram description download.You can use the EPM5064JC-1 Pluggable Connectors, DSP Datesheet PDF, find EPM5064JC-1 pin diagram and circuit diagram and usage method of function, EPM5064JC-1 electronics tutorials.You can download from the Bonchip.
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